Accomplishing highly accurate test and control is hard enough, but when the engineer needs to coordinate among several different processor cards, or instruments, in a PXI computer chassis, the challenge grows. PXI is a CompactPCI computer platform for instrumentation. For instance, in multichannel testing, it is necessary to precisely synchronize the waveforms of the instruments.
National Instruments (NI) a supplier of computer-based instruments for test and automation, had different research and development teams working simultaneously to design instruments. This is a great system for rapid product development, but it could lead to products that don’t work together as closely as would be desired, or result in redundant efforts across the groups.
To address this, NI embarked on the creation of the Synchronization and Memory Core (SMC), a flexible, cross-product architecture that forms the foundation of NI’s next generation of modular instruments. The design goal was to redefine both the measurement accuracy expectation of the control engineer, and the throughput requirements of a manufacturing test engineer, so that a test system used in the design and validation stages of product development can be reused on the factory floor.
“By investing in an architecture that spans product lines, NI is able to deliver the latest advances in commercial technology to customers faster than ever before while also reducing future engineering expenses,” says Brian Anderson, NI PXI product manager. “These flexible instruments combined with LabVIEW create a measurement platform that can be used from design to manufacturing test to reduce development time and lower the cost of test.”
The SMC architecture consists of a printed circuit board that contains the communication interface to the host computer, deep onboard memory, and timing and synchronization electronics that are common to all SMC instrument designs. The electronics specific to each instrument—for instance, the signal conditioning and data converters for the high-speed digitizer—are then implemented on a daughterboard. This is similar to the motherboard/daughterboard architecture used in personal computers. Although the concept is simple, the benefits of the architecture are substantial.
Synchronization is key for ensuring correct timing of instruments of the same type (homogeneous synchronization) for channel expansion, and for tightly correlating the input and/or output of two different instruments (heterogeneous synchronization). By definition, mixed-signal test systems require use of at least two of three instruments: digitizer, arbitrary waveform generator (AWG) and digital waveform generator/analyzer.
The goal of synchronization is to be able to generate and receive waveforms precisely among multiple SMC instruments. With two arbitrary waveform generators, for example, this goal demands that two AWGs generate identical waveforms in perfect alignment with the ability to skew the phase between the waveforms. With sampling rates of 100 MHz on all three devices, care and attention was given to the clock and trigger distribution among all devices. Picosecond level rms clock jitter on all devices deliver the performance required to integrate all three devices at 100 MS/s at the subnanosecond level.
Synchronization is implemented by sharing triggers and reference clock between multiple devices. The reference clock can be supplied by the designated “master” device or by a dedicated high-precision clock source. Each SMC instrument has voltage-controlled crystal oscillators (VCXOs) phase locked to the PXI 10 MHz reference clock. All instruments with VCXOs locked to the 10 MHz VCXO inherit the ±100 ppb accuracy.
SMC’s benefits are in the future, with yet-to-be-released products. The current set of instruments run at 100 MS/s where each sample is up to 16 bits, resulting in a data rate of 200 MB/s, but the connection between SMC and the daughterboards is capable of data rates in excess of 2 GB/s.
